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1 ltc1530 1530fa the ltc ? 1530 is a high power synchronous switching regulator controller optimized for 5v to 1.3v-3.5v output applications. its synchronous switching architecture drives two external n-channel mosfet devices to provide high efficiency. the ltc1530 contains a precision trimmed reference and feedback system that provides worst-case output voltage regulation of 2% over temperature, load current and line voltage shifts. current limit circuitry senses the output current through the on-resistance of the topside n-channel mosfet, providing an adjustable current limit without requiring an external low value sense resistor. the ltc1530 includes a fixed frequency pwm oscillator that free runs at 300khz, providing greater than 90% efficiency in converter designs from 1a to 20a of output current. shutdown mode drops the ltc1530 supply cur- rent to 45 m a. the ltc1530 is specified for commercial and industrial temperature ranges and is available in the s0-8 package. figure 1. single 5v to 3.3v supply load current (a) 0 0.3 efficiency (%) 100 90 80 70 60 50 40 30 20 10 0 4 8 10 1530 f01b 2 6 12 14 t a = 25 c efficiency vs load current n high power buck converter from 5v or 3.3v input n adjustable current limit in s0-8 with topside fet r ds(on) sensing n no external sense resistor required n hiccup mode current limit protection n adjustable, fixed 1.9v, 2.5v, 2.8v and 3.3v output n all n-channel mosfet synchronous driver n excellent output regulation: 2% over line, load and temperature variations n high efficiency: over 95% possible n fast transient response n fixed 300khz frequency operation n internal soft-start circuit n quiescent current: 1ma; 45 m a in shutdown n power supply for pentium ? ii, amd-k6 ? -2, sparc, alpha and pa-risc microprocessors n high power 5v to 1.3v-3.5v regulators + + 2.7k 0.1 f 10 f + c out 330 f 7 c in 1200 f 4 l1 2 h mbr0530t1 mbr0530t1 20 pv cc gnd ltc1530-3.3 g1 comp i fb i max g2 v out v out 3.3v 14a 1530 f01a v in 5v c in : sanyo 10mv1200gx c out : avx tpse337m006r0100 l1: coiltronics ctx02-13198 or panasonic etqp6f2r5ha q1, q2: siliconix sud50n03-10 10k 0.022 f 0.22 f q1 q2 150pf , ltc and lt are registered trademarks of linear technology corporation. pentium is a registered trademark of intel corp. amd-k6 is a registered trademark of advanced micro devices, inc. descriptio u features applicatio s u typical applicatio u high power synchronous switching regulator controller
2 ltc1530 1530fa order part number ltc1530cs8 ltc1530cs8-1.9 ltc1530cs8-2.5 ltc1530cs8-2.8 ltc1530cs8-3.3 ltc1530is8 ltc1530is8-1.9 ltc1530is8-2.5 ltc1530is8-2.8 ltc1530is8-3.3 s8 part marking t jmax = 125 c, q ja = 130 c/ w *v out for fixed voltage versions top view g1 g2 i fb i max pv cc gnd s8 package 8-lead plastic so 1 2 3 4 8 7 6 5 *v sense / v out comp 1530 153019 153025 530i28 530i33 1530i 530i19 530i25 (note 1) supply voltage pv cc ........................................................................ 14v input voltage i fb (note 2) ............................................... pv cc + 0.3v i max ........................................................ C 0.3v to 14v i fb input current (notes 2,3) ............................ C 100ma operating ambient temperature range ltc1530c ............................................... 0 c to 70 c ltc1530i ............................................ C 40 c to 85 c maximum junction temperature ltc1530c, ltc1530i ...................................... 125 c storage temperature range ................. C 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c 153028 153033 the l denotes specifications that apply over the full operating temperature range, otherwise specifications are at t a = 25 c. pv cc = 12v unless otherwise noted. (note 3) symbol parameter conditions min typ max units v sense internal feedback voltage ltc1530cs8 (note 4) 1.223 1.235 1.247 v l 1.216 1.235 1.254 v v out output voltage ltc1530cs8-1.9 (note 4) 1.881 1.9 1.919 v l 1.871 1.9 1.929 v ltc1530cs8-2.5 (note 4) 2.475 2.5 2.525 v l 2.462 2.5 2.538 v ltc1530cs8-2.8 (note 4) 2.772 2.8 2.828 v l 2.758 2.8 2.842 v ltc1530cs8-3.3 (note 4) 3.267 3.3 3.333 v l 3.250 3.3 3.350 v g merr error amplifier transconductance (note 5) l 1.6 2 2.6 millimho the l denotes specifications that apply over the full operating temperature range, otherwise specifications are at t a = 25 c. pv cc = 12v unless otherwise noted. (note 3) symbol parameter conditions min typ max units pv cc supply voltage (note 6) l 13.2 v v uvlo undervoltage lockout voltage (note 7) 3.5 3.75 v v sense internal feedback voltage ltc1530is8 (note 4) 1.223 1.235 1.247 v l 1.210 1.235 1.260 v package/order i for atio uu w absolute axi u rati gs w ww u electrical characteristics consult ltc marketing for parts specified with wider operating temperature ranges.
3 ltc1530 1530fa symbol parameter conditions min typ max units v out output voltage ltc1530is8-1.9 (note 4) 1.881 1.9 1.919 v l 1.862 1.9 1.938 v ltc1530is8-2.5 (note 4) 2.475 2.5 2.525 v l 2.450 2.5 2.550 v ltc1530is8-2.8 (note 4) 2.772 2.8 2.828 v l 2.744 2.8 2.856 v ltc1530is8-3.3 (note 4) 3.267 3.3 3.333 v l 3.234 3.3 3.366 v d v out output load regulation i out = 0 to 14a C 5 mv output line regulation v in = 4.75v to 5.25v, i out = 0 1mv i pvcc operating supply current figure 3, v fb = 0v (note 8) 15 ma quiescent current figure 3, comp = 0.5v, v fb = 5v l 1.0 1.4 ma shutdown supply current figure 3, comp = 0 (note 9) l 45 80 m a f osc internal oscillator frequency figure 4 l 250 300 350 khz oscillator valley voltage v comp at 0% duty cycle 2.5 v oscillator peak voltage v comp at max duty cycle 3.5 v g err error amplifier open-loop dc gain (note 5) l 40 54 db g merr error amplifier transconductance (note 5) l 1.6 2 2.8 millimho i max i max sink current v imax = 5v 170 200 230 m a v imax = 5v l 120 200 300 m a i max sink current tempco v imax = 5v 3300 ppm/ c v shdn shutdown threshold voltage figure 4, measured at comp pin (note 9) l 100 180 mv sr ss internal soft-start slew rate figure 4, comp pulls high, v fb = 0v 0.4 v/ms (notes 9, 10) t ss internal soft-start wake-up time figure 4, comp pulls high to g1 - (note 10) 3.5 ms t r , t f driver rise and fall time figure 4 l 90 140 ns t nol driver nonoverlap time figure 4 l 30 100 ns dc max maximum g1 duty cycle figure 4 l 81 86 % note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: if i fb is taken below gnd, it is clamped by an internal diode. this pin handles input currents 100ma below gnd without latch-up. in the positive direction, it is not clamped to pv cc . note 3: all currents into device pins are positive; all currents out of device pins are negative. all voltages are referenced to ground unless otherwise specified. note 4: the ltc1530 is tested in an op amp feedback loop which regulates v sense or v out based on v comp = 2v for the error amplifier. note 5: the open-loop dc gain and transconductance from the v fb pin to the comp pin are g err and g merr respectively. for fixed output voltage versions, the actual open-loop dc gain and transconductance are g err and g merr multiplied by the ratio 1.235/v out . note 6: the total voltage from the pv cc pin to the gnd pin must be 3 8v for the current limit protection circuit to be active. note 7: g1 and g2 begin to switch once pv cc is 3 the undervoltage lockout threshold voltage. note 8: supply current in normal operation is dominated by the current needed to charge and discharge the external fet gates. this current varies with the ltc1530 operating frequency, supply voltage and the external fets used. note 9: the ltc1530 enters shutdown if comp is pulled low. note 10: slew rate is measured at the comp pin on the transition from shutdown to active mode. the l denotes specifications that apply over the full operating temperature range, otherwise specifications are at t a = 25 c. pv cc = 12v unless otherwise noted. (note 3) electrical characteristics
4 ltc1530 1530fa output current (a) 2.510 2.508 2.506 2.504 2.502 2.500 2.498 2.496 2.494 2.492 2.490 output voltage (v) 1530 g02 0123456 t a = 25 c refer to figure 2 efficiency vs load current load regulation load current (a) 0 0.3 efficiency (%) 100 90 80 70 60 50 40 30 20 10 0 4 8 10 1530 g01 2 6 12 14 t a = 25 c refer to figure 10 typical perfor a ce characteristics uw ltc1530 v sense vs temperature temperature ( c) ?5 v sense (v) 1.260 1.255 1.250 1.245 1.240 1.235 1.230 1.225 1.220 1.215 1.210 ?5 25 45 125 1530 g03 ?5 5 65 85 105 ltc1530-1.9 v out vs temperature ltc1530-2.5 v out vs temperature temperature ( c) ?5 v out (v) 1.930 1.925 1.920 1.915 1.910 1.905 1.900 1.895 1.890 1.885 1.880 1.875 1.870 25 1530 g04 ?5 ?5 5 45 65 85 105 125 temperature ( c) ?5 v out (v) 2.55 2.54 2.53 2.52 2.51 2.50 2.49 2.48 2.47 2.46 2.45 ?5 25 45 125 1530 g05 ?5 5 65 85 105 undervoltage lockout threshold voltage vs temperature ltc1530-2.8 v out vs temperature temperature ( c) ?5 v out (v) 2.85 2.84 2.83 2.82 2.81 2.80 2.79 2.78 2.77 2.76 2.75 2.74 25 1530 g06 ?5 ?5 5 45 65 85 105 125 ltc1530-3.3 v out vs temperature temperature ( c) ?5 v out (v) 3.36 3.35 3.34 3.33 3.32 3.31 3.30 3.29 3.28 3.27 3.26 3.25 3.24 3.23 25 1530 g06 ?5 ?5 5 45 65 85 105 125 error amplifier transconductance vs temperature temperature ( c) ?5 undervoltage lockout threshold (v) 4.5 4.3 4.1 3.9 3.7 3.5 3.3 3.1 2.9 2.7 2.5 2.3 ?5 25 45 125 1530 g08 ?5 5 65 85 105 temperature ( c) ?5 error amplifier transconductance (millimho) 2.8 2.6 2.4 2.2 2.0 1.8 1.6 ?5 25 45 125 1530 g09 ?5 5 65 85 105
5 ltc1530 1530fa pv cc shutdown supply current vs temperature pv cc supply current vs gate capacitance shutdown threshold voltage vs temperature output overcurrent protection transient response 50 m s/div 1530 g18 2a/div 50mv/div error amplifier open-loop gain vs temperature oscillator frequency vs temperature maximum g1 duty cycle vs ambient temperature i max sink current vs temperature temperature ( c) ?5 error amplifier open-loop dc gain (db) 60 55 50 45 40 ?5 25 45 125 1530 g10 ?5 5 65 85 105 temperature ( c) ?5 oscillator frequency (khz) 350 340 330 320 310 300 290 280 270 260 250 ?5 25 45 125 1530 g11 ?5 5 65 85 105 ambient temperature ( c) ?5 maximum g1 duty cycle (%) 92 90 88 86 84 82 80 78 ?5 25 45 125 1530 g12 ?5 5 65 85 105 thermal shutdown occurs beyond these points g1, g2 capacitance = 1000pf pv cc = 12v f osc = 300khz 7700pf 5500pf 3300pf 2200pf temperature ( c) ?5 i max sink current ( a) 300 280 260 240 220 200 180 160 140 120 ?5 25 45 125 1530 g13 ?5 5 65 85 105 pv cc = 12v g1, g2 are not switching gate capacitance (nf) 0 pv cc supply current (ma) 6 1530 g14 24 8 70 60 50 40 30 20 10 0 1357 pv cc = 12v t a = 25 c gate capacitance = c g1 = c g2 temperature ( c) ?5 80 75 70 65 60 55 50 45 40 35 30 ?5 25 45 125 1530 g15 ?5 5 65 85 105 pv cc = 12v pv cc shutdown current ( a) output current (a) 0 output voltage (v) 3.0 2.5 2.0 1.5 1.0 0.5 0 8 1530 g17 2 13579 4 6 10 short-circuit current pv cc = 12v t a = 25 c refer to figure 2 temperature ( c) ?5 shutdown threshold voltage (mv) 250 200 150 100 50 0 ?5 25 45 125 1530 g16 ?5 5 65 85 105 pv cc = 12v measured at comp pin typical perfor a ce characteristics uw
6 ltc1530 1530fa comp to compensate the feedback loop for optimum transient response. to shut down the ltc1530, pull this pin below 0.1v with an open-collector or open-drain transistor. supply current is typically reduced to 45 m a in shutdown. an internal 4 m a pullup ensures start-up. i max (pin 5): current limit threshold. current limit is set by the voltage drop across an external resistor connected between the drain of q1 and i max . this voltage is com- pared with the voltage across the r ds(on) of the high side mosfet. the ltc1530 contains a 200 m a internal pull- down at i max to set current limit. this 200 m a current source has a positive temperature coefficient to provide first order correction for the temperature coefficient of the external n-channel mosfets r ds(on) . i fb (pin 6): current limit sense pin. connect i fb to the switching node between q1s source and q2s drain. if i fb drops below i max with g1 on, the ltc1530 enters current limit. under this condition, the internal soft-start capacitor is discharged and comp is pulled low slowly. duty cycle is reduced and output power is limited. the current limit circuitry is only activated if pv cc 3 8v. this action eases start-up considerations as pv cc is ramping up because the mosfets r ds(on) can be significantly higher than what is measured under normal operating conditions. the current limit circuit is disabled by floating i max and short- ing i fb to pv cc . g2 (pin 7): gate drive for the low side n-channel mosfet, q2. this output swings from pv cc to gnd. it is always low if g1 is high or if the output is disabled. to prevent undershoot during a soft-start cycle, g2 is held low until g1 first transitions high. g1 (pin 8): gate drive for the topside n-channel mosfet, q1. this output swings from pv cc to gnd. it is always low if g2 is high or if the output is disabled. pv cc (pin 1): power supply for g1, g2 and logic. pv cc must connect to a potential of at least v in + v gs(on)q1 . if v in = 5v, generate pv cc using a simple charge pump connected to the switching node between q1 and q2 (see figure 1) or connect pv cc to a 12v supply. bypass pv cc properly or erratic operation will result. a low esr 10 m f capacitor or larger bypass capacitor along with a 0.1 m f surface mount ceramic capacitor in parallel is recom- mended from pv cc directly to gnd to minimize switching ripple. switching ripple should be 100mv at the pv cc pin. gnd (pin 2): power and logic ground. gnd is connected to the internal gate drive circuitry and the feedback cir- cuitry. to obtain good output voltage regulation, use proper ground techniques between the ltc1530 gnd and bottom-side fet source and the negative terminal of the output capacitor. see the applications information section for more details on pcb layout techniques. v sense /v out (pin 3): feedback voltage pin. for the adjust- able ltc1530, use an external resistor divider to set the required output voltage. connect the tap point of the resistor divider network to v sense and the top of the divider network to the output voltage. for fixed output voltage versions of the ltc1530, the resistor divider is internal and the top of the resistor divider network is brought out to v out . in general, the resistor divider network for each fixed output voltage version sinks ap- proximately 30 m a. connect v out to the output voltage either at the output capacitors or at the actual point of load. v sense /v out is sensitive to switching noise injected into the pin. isolate high current switching traces from this pin and its pcb trace. comp (pin 4): external compensation. the comp pin is connected to the error amplifier output and the input of the pwm comparator. an rc + c network is typically used at uu u pi fu ctio s
7 ltc1530 1530fa figure 2 figure 3 pv cc 12v v in 5v q1 si4410dy l o * 2.4 h *sumida cdrh127-2r4 **avx tpse337m006r0100 ***sanyo 10mv1200gx + q2 si4410dy r c 8.2k 750 100 c c 0.01 f 0.1 f 10 f + + c o ** 330 f 8 c in *** 1200 f 2 v out 2.5v 6a 1530 f02 c1 100pf i max pv cc gnd g1 i fb g2 v out comp ltc1530-2.5 + 0.1 f 10 f 1530 f03 i max pv cc pv cc 12v gnd g1 nc nc nc v fb i fb g2 v sense /v out comp comp ltc1530 + + + comp i comp c ss i ss m ss disdr internal oscillator logic and thermal shutdown power down 4 + v ref v ref ?3% i fb v ref + 3% err min g m = 2millimho pwm + max pv cc fb + g2 g1 8 1 7 3 v sense fb r1 r2 for fixed voltage versions 3 v out v ref v ref v ref ?3% v ref + 3% v ref /2 v ref /2 1530 bd lvc cc 6 i max i max 5 hcl mono mhcl fixed v out 1.9v 2.5v 2.8v 3.3v r1 23.4k 44.4k 54.9k 68.4k r2 43.2k 43.2k 43.2k 40.8k block diagra w test circuits
8 ltc1530 1530fa g1 rise/fall 3300pf + 0.1 f 10 f 1530 f04a pv cc i fb pv cc 12v gnd g1 g2 g2 rise/fall v out comp comp ltc1530 3300pf 90% 90% t r t nol t nol t f 50% 50% 50% 50% comp g1 1530 f04b t ss 10% 10% figure 4 overview the ltc1530 is a voltage feedback, synchronous switch- ing regulator controller (see block diagram) designed for use in high power, low voltage step-down (buck) convert- ers. it includes an on-chip soft-start capacitor, a pwm generator, a precision reference trimmed to 1%, two high power mosfet gate drivers and all the necessary feed- back and control circuitry to form a complete switching regulator circuit running at 300khz. the ltc1530 includes a current limit sensing circuit that uses the topside external n-channel power mosfet as a current sensing element, eliminating the need for an external sense resistor. if the current comparator, cc, detects an overcurrent condition, the duty cycle is reduced by discharging the internal soft-start capacitor through a voltage-controlled current source. under severe over- loads or output short-circuit conditions, the soft-start capacitor is pulled to ground and a start-up cycle is initiated. if the short circuit or overload persists, the chip repeats soft-start cycles and prevents damage to external components. theory of operation primary feedback loop the ltc1530 compares the output voltage with the inter- nal reference at the error amplifier inputs. the error amplifier outputs an error signal to the pwm comparator. this signal is compared to the fixed frequency oscillator sawtooth waveform to generate the pwm signal. the pwm signal drives the external mosfets at the g1 and g2 pins. the resulting chopped waveform is filtered by l o and c out which closes the loop. loop frequency compensa- tion is typically accomplished with an external rc + c network at the comp pin, which is the output node of the transconductance error amplifier. min, max feedback loops two additional comparators in the feedback loop provide high speed fault correction in situations where the error amplifier cannot respond quickly enough. min compares the feedback signal to a voltage 3% below the internal reference. if the signal is below the comparator threshold, the min comparator overrides the error amplifier and forces the loop to maximum duty cycle, typically 86%. similarly, the max comparator forces the output to 0% duty cycle if the feedback signal is greater than 3% above the internal reference. to prevent these two comparators from triggering due to noise, the min and max compara- tors response times are deliberately delayed by two to three microseconds. these comparators help prevent extreme output perturbations with fast output load current transients, while allowing the main feedback loop to be optimally compensated for stability. thermal shutdown the ltc1530 has a thermal protection circuit that disables both internal gate drivers if activated. g1 and g2 are held low and the ltc1530 supply current drops to about 1ma. test circuits applicatio s i for atio wu uu
9 ltc1530 1530fa typically, thermal shutdown is activated if the ltc1530s junction temperature exceeds 150 c. g1 and g2 resume switching when the junction temperature drops below 100 c. soft-start and current limit unlike other pwm parts, the ltc1530 includes an on-chip soft-start capacitor that is used during start-up and cur- rent limit operation. on power-up, an internal 4 m a pull-up at comp brings the ltc1530 out of shutdown mode. an internal current source then charges the internal c ss capacitor. the comp pin is clamped to one v gs above the voltage on c ss during start-up. this prevents the error amplifier from forcing the loop to maximum duty cycle. the ltc1530 operates at low duty cycle as the comp pin voltage increases above about 2.4v. the slew rate of the soft-start capacitor is typically 0.4v/ms. as the voltage on c ss continues to increase, m ss eventually turns off and the error amplifier regulates the output. the min comparator is disabled if soft-start is active to prevent an override of the soft-start function. the ltc1530 includes another feedback loop to control operation in current limit. before each falling edge of g1, the current comparator, cc, samples and holds the volt- age drop across external mosfet q1 with the ltc1530s i fb pin. cc compares the voltage at i fb to the voltage at the i max pin. as peak current rises, the voltage across the r ds(on) of q1 increases. if the voltage at i fb drops below i max , indicating that q1s drain current has exceeded the maximum desired level, cc pulls current out of c ss . duty cycle decreases and the output current is controlled. the cc comparator pulls current out of c ss in proportion to the voltage difference between i fb and i max . under minor overload conditions, the voltage at c ss falls gradually, creating a time delay before current limit activates. very short, mild overloads may not affect the output voltage at all. significant overload conditions allow the voltage on c ss to reach a steady state and the output remains at a reduced voltage until the overload is removed. serious overloads generate a large overdrive and allow cc to pull the c ss voltage down quickly, thus preventing damage to the external components. by using the r ds(on) of q1 to measure output current, the current limit circuit eliminates the sense resistor that would otherwise be required. this minimizes the number of components in the high current power path. the current limit circuitry is not designed to be highly accurate. it is primarily meant to prevent damage to the power supply circuitry during fault conditions. the exact current level where current limiting takes effect will vary from unit to unit as the r ds(on) of q1 varies. figure 5a illustrates the basic connections for the current limit circuitry. for a given current limit level, the external resistor from i max to v in is determined by: ltc1530 + + c in c out v out 1530 f05 v in l o 20 i fb g1 q1 q2 g2 i max r imax 200 a + cc maximum load current i inductor ripple current = v f oscillator frequency = 300khz l value r n-r tance of q1 at i 200 a sink current ripple in osc o ds(on)q1 lmax r ir i where ii i i vv lv f ltc inductor o esis i imax lmax ds on q imax lmax load ripple load out out oin osc imax = () =+ = = - ()() ()()() = = = =m () , 1 2 1530 figure 5a. current limit setting (use kelvin-sense connections directly at the drain and source of q1) applicatio s i for atio wu uu
10 ltc1530 1530fa figure 5b plots the minimum required r imax resistor (k w ) versus the maximum operating load current (i lmax = i load + i ripple /2) as a function of q1s r ds(on) . note that during an intial power-up sequence (v out = 0v), the inductors start-up current i st is much higher than the steady-state condition, i lmax . the difference between i st and i lmax is affected by the input power supply slew rate, the input and output voltages, the ltc1530 soft-start slew rate, the maximum duty cycle and the inductor and output capacitor values. for a given application, the input and output requirements are known and determine the main inductor and output capacitor values. these values establish the transient load recovery time. in general, a low value inductor combined with high value output capacitance has a short transient load recovery time at the expense of higher inductor ripple and start-up current (i ripple and i st ). however, if a small inductor and large value output capacitors are chosen, the value of r imax obtained from figure 5b may be too small to allow proper regulator start-up. during start-up, if i st is higher than the current limit threshold set by the r imax resistor, the ltc1530 current limit comparator turns on. this comparator then limits input charging current by reducing duty cycle. during this time, if v out doesnt increase above one-half of the rated value, the ltc1530 hard current limit circuit turns on. this circuit forces the ltc1530 to repeat a soft-start cycle and the power supply fails to start. if v out increases above one-half of the rated value, the power supply output may start-up properly depending on whether the limited input current charges the output capacitor and prevents hard current limit action. therefore, select r imax with the start-up current (i st ) in mind. choosing r imax to set the current comparator threshold above i st ensures proper power supply start-up as well as recovery from an output fault condition. figures 6a and 6b plot the start-up i st vs output capaci- tance and inductance for unloaded and loaded conditions with the current limit circuit disabled. figures 6a and 6b are provided as examples. actual i st under start-up con- ditions must be measured for any application circuit so that r imax can be properly chosen. i lmax (a) 0 minimum required r imax ( ) 5500 4500 3500 2500 1500 500 16 18 1530 f05b 4 26 810 14 12 20 r imax 3 500 i lmax = i load + i ripple /2 q1 r ds(on) = 0.05 0.04 0.03 0.02 0.01 figure 5b. minimum required r imax vs i lmax output capacitance (mf) 0 start-up i st (a) 25 20 15 10 5 0 2 468 1530 f06a 10 12 t a = 25 c v in = 5v i load = 0a l = 1.2 h l = 4.7 h l = 2.4 h figure 6a. start-up i st vs output capacitance output capacitance (mf) 0 start-up i st (a) 30 25 20 15 10 5 0 2 468 1530 f06b 10 12 t a = 25 c v in = 5v i load = 10a l = 1.2 h l = 4.7 h l = 2.4 h figure 6b. start-up i st vs output capacitance applicatio s i for atio wu uu
11 ltc1530 1530fa power mosfets two n-channel power mosfets are required for synchro- nous ltc1530 circuits. they should be selected based primarily on threshold voltage and on-resistance consid- erations. thermal dissipation is often a secondary con- cern in high efficiency designs. the required mosfet threshold should be determined based on the available power supply voltages and/or the complexity of the gate drive charge pump scheme. in 5v input designs where a 12v supply is used to power pv cc , standard mosfets with r ds(on) specified at v gs = 5v or 6v can be used with good results. the current drawn from the 12v supply varies with the mosfets used and the ltc1530s operat- ing frequency, but is generally less than 50ma. ltc1530 applications that use a 5v v in voltage and a doubling charge pump to generate pv cc do not provide enough gate drive voltage to fully enhance standard power mosfets. under this condition, the effective mosfet r ds(on) may be quite high, raising the dissipa- tion in the fets and reducing efficiency. in addition, power supply start-up problems can occur with standard power mosfets. these start-up problems can occur for two reasons. first, if the mosfet is not fully enhanced, the higher effective r ds(on) causes the ltc1530 to acti- vate current limit at a much lower level than the desired trip point. second, standard mosfets have higher gate threshold voltages than logic level mosfets, thereby increasing the pv cc voltage required to turn them on. a mosfet whose r ds(on) is rated at v gs = 4.5v does not necessarily have a logic level mosfet gate threshold voltage. logic level fets are the recommended choice for 5v-only systems. logic level fets can be fully enhanced with a doubler charge pump and will operate at maximum efficiency. note that doubler charge pump designs run- ning from supplies higher than 6.5v should include a zener diode clamp at pv cc to prevent transients from exceeding the absolute maximum rating of the pin. after the mosfet threshold voltage is selected, choose the r ds(on) based on the input voltage, the output voltage, allowable power dissipation and maximum output cur- rent. in a typical ltc1530 buck converter circuit, operat- ing in continuous mode, the average inductor current is equal to the output load current. this current flows through + + 0.22 f 10 f + c o c in l o mbr0530t1 mbr0530t1 optional for v in > 6.5v ltc1530 pv cc g1 v out 1530 f07 v in 13v 1n5243b q1 q2 g2 in order for the current limit circuit to operate properly and to obtain a reasonably accurate current limit threshold, the i max and i fb pins must be kelvin sensed at q1s drain and source pins. a 0.1 m f decoupling capacitor can also be connected across r imax to filter switching noise. in addi- tion, ltc recommends that the voltage drop across the r imax resistor be set to 3 100mv. otherwise, noise spikes or ringing at q1s source can cause the actual current limit to be greater than the desired current limit set point. mosfet gate drive the pv cc supply must be greater than the input supply voltage, v in , by at least one power mosfet v gs(on) for efficient operation. this higher voltage can be supplied with a separate supply, or it can be generated using a simple charge pump as shown in figure 7. the 86% maximum duty cycle ensures sufficient off-time to refresh the charge pump during each cycle. as pv cc is powered up from 0v, the ltc1530 undervolt- age lockout circuit prevents g1 and g2 from pulling high until pv cc reaches about 3.5v. to prevent q1s high r ds(on) from triggering the current limit comparator while pv cc is slewing, the current limit circuit is disabled until pv cc is 3 8v. in addition, on start-up or recovery from thermal shutdown, the driver logic is designed to hold g2 low until g1 first goes high. figure 7. doubling charge pump applicatio s i for atio wu uu
12 ltc1530 1530fa note that while the required r ds(on) values suggest large mosfets, the power dissipation numbers are only 1.39w per device or less large to-220 packages and heat sinks are not necessarily required in high efficiency appli- cations. siliconix si4410dy or international rectifier irf7413 (both in so-8) or siliconix sud50n03 or motorola mtd20n03hdl (both in dpak) are small footprint sur- face mount devices with r ds(on) values below 0.03 w at 5v of v gs that work well in ltc1530 circuits. with higher output voltages, the r ds(on) of q1 may need to be signifi- cantly lower than that for q2. these conditions can often be met by paralleling two mosfets for q1 and using a single device for q2. using a higher p max value in the r ds(on) calculations generally decreases the mosfet cost and the circuit efficiency and increases the mosfet heat sink requirements. in most ltc1530 applications, r ds(on) is used as the current sensing element. mosfet r ds(on) has a positive temperature coefficient. therefore, the ltc1530 i max sink current is designed with a positive 3300ppm/ c tempera- ture coefficient. the positive tempco of i max provides first order correction for current limit vs temperature. there- fore, current limit does not have to be set to an increased level at room temperature to guarantee a desired output current at elevated temperatures. table 1 highlights a variety of power mosfets that are suitable for use in ltc1530 applications. inductor selection the inductor is often the largest component in an ltc1530 design and must be chosen carefully. choose the inductor value and type based on output slew rate requirements and expected peak current. the required output slew rate primarily controls the inductor value. the maximum rate of rise of inductor current is set by the inductors value, the input-to-output voltage differential and the ltc1530s maximum duty cycle. in a typical 5v input, 2.8v output application, the maximum rise time will be: dc vv ll max in out - ? ? ? ? = 185 . a s m either q1 or q2 with the power dissipation split up accord- ing to the duty cycle: dc q v v dc q v v vv v out in out in in out in () () 1 21 = =- = - () the r ds(on) required for a given conduction loss can now be calculated by rearranging the relation p = i 2 r. r p dc q i vp v i r p dc q i vp vv i ds on q max q max in max q out max ds on q max q max in max q in out max () () () () () () () () 1 1 2 1 2 2 2 2 2 2 1 2 = [] () = () [] () () = [] () = () [] - () () p max should be calculated based primarily on required efficiency or allowable thermal dissipation. a high efficiency buck converter designed for the pentium ii with 5v input and a 2.8v, 11.2a output might allow no more than 4% efficiency loss at full load for each mosfet. assuming roughly 90% efficiency at this current level, this gives a p max value of: (2.8)(11.2a/0.9)(0.04) = 1.39w per fet and a required r ds(on) of: r vw va r vw vv a ds on q ds on q () () . .. . . .. . 1 2 2 2 5139 2 8 11 2 0 020 5139 528112 0 025 = () ? ? ? = = () - () ? ? ? = w w applicatio s i for atio wu uu
13 ltc1530 1530fa where l is the inductor value in m h. with proper frequency compensation, the combination of the inductor and output capacitor values determine the transient recovery time. in general, a smaller value inductor improves transient response at the expense of ripple and inductor core saturation rating. a 2 m h inductor has a 0.9a/ m s rise time in this application, resulting in a 5.5 m s delay in responding to a 5a load current step. during this 5.5 m s, the difference between the inductor current and the output current is made up by the output capacitor. this action causes a temporary voltage droop at the output. to minimize this effect, the inductor value should usually be in the 1 m h to 5 m h range for most 5v input ltc1530 circuits. different combinations of input and output voltages and expected loads may require different values. once the required inductor value is selected, choose the inductor core type based on peak current and efficiency requirements. peak current in the inductor is equal to the maximum output load current plus half of the peak-to- peak inductor ripple current. inductor ripple current is set by the inductors value, the input voltage, the output voltage and the operating frequency. if the efficiency is high, ripple current is approximately equal to: i vv v flv ripple in out out osc o in = - ()() ()()() where f osc = ltc1530 oscillator frequency l o = inductor value solving this equation for a typical 5v to 2.8v application with a 2 m h inductor, ripple current is: 22 056 300 2 2 .. v khz h a ()() ()() = m p-p peak inductor current at 11.2a load: 11 2 2 2 12 2 .. a a a += the ripple current should generally fall between 10% and 40% of the output current. the inductor must be able to withstand this peak current without saturating, and the copper resistance in the winding should be kept as low as possible to minimize resistive power loss. note that in applicatio s i for atio wu uu rds(on) typical input at 25 c rated current capacitance q q q q q jc t jmax manufacturer part no. package ( w ) (a) ciss (pf) ( c/w) ( c) siliconix sud50n03-10 to-252 0.019 15a at 25 c 3200 1.8 175 10a at 100 c siliconix si4410dy so-8 0.020 10a at 25 c 2700 150 8a at 75 c on semiconductor mtd20n03hdl dpak 0.035 20a at 25 c 880 1.67 150 16a at 100 c fairchild fds6680 so-8 0.01 11.5a at 25 c 2070 25 150 on semiconductor mtb75n03hdl* d 2 pak 0.0075 75a at 25 c 4025 1.0 150 59a at 100 c ir irl3103s d 2 pak 0.014 56a at 25 c 1600 1.8 175 40a at 100 c ir irlz44 to-220 0.028 50a at 25 c 3300 1.0 175 36a at 100 c fuji 2sk1388 to-220 0.037 35a at 25 c 1750 2.08 150 note: please refer to the manufacturers data sheet for testing conditions and detailed information. *users must consider the power dissipation and thermal effects in the ltc1530 if driving external mosfets with high values of i nput capacitance. refer to the pv cc supply current vs gate capacitance in the typical performance characteristics section. table 1. recommended mosfets for ltc1530 applications
14 ltc1530 1530fa circuits not employing the current limit function, the current in the inductor may rise above this maximum under short circuit or fault conditions; the inductor should be sized accordingly to withstand this additional current. inductors with gradual saturation characteristics (example: powdered iron) are often the best choice. input and output capacitors a typical ltc1530 design places significant demands on both the input and the output capacitors. during normal steady load operation, a buck converter like the ltc1530 draws square waves of current from the input supply at the switching frequency. the peak current value is equal to the output load current plus 1/2 the peak-to-peak ripple cur- rent. most of this current is supplied by the input bypass capacitor. the resulting rms current flow in the input capacitor heats it and causes premature capacitor failure in extreme cases. maximum rms current occurs with 50% pwm duty cycle, giving an rms current value equal to i out /2. a low esr input capacitor with an adequate ripple current rating must be used to ensure reliable operation. note that capacitor manufacturers ripple cur- rent ratings are often based on only 2000 hours (3 months) lifetime at rated temperature. further derating of the input capacitor ripple current beyond the manufacturers speci- fication is recommended to extend the useful life of the circuit. lower operating temperature has the largest effect on capacitor longevity. the output capacitor in a buck converter under steady state conditions sees much less ripple current than the input capacitor. peak-to-peak current is equal to inductor ripple current, usually 10% to 40% of the total load current. output capacitor duty places a premium not on power dissipation but on esr. during an output load transient, the output capacitor must supply all of the additional load current demanded by the load until the ltc1530 adjusts the inductor current to the new value. esr in the output capacitor results in a step in the output voltage equal to the esr value multiplied by the change in load current. an 11a load step with a 0.05 w esr output capacitor results in a 550mv output voltage shift; this is 19.6% of the output voltage for a 2.8v supply! because of the strong relationship between output capacitor esr and output load transient response, choose the output capaci- tor for esr, not for capacitance value. a capacitor with suitable esr will usually have a larger capacitance value than is needed to control steady-state output ripple. electrolytic capacitors rated for use in switching power supplies with specified ripple current ratings and esr can be used effectively in ltc1530 applications. os-con electrolytic capacitors from sanyo and other manufactur- ers give excellent performance and have a very high performance/size ratio for electrolytic capacitors. surface mount applications can use either electrolytic or dry tantalum capacitors. tantalum capacitors must be surge tested and specified for use in switching power supplies. low cost, generic tantalums are known to have very short lives followed by explosive deaths in switching power supply applications. avx tps series surface mount devices are popular surge tested tantalum capacitors that work well in ltc1530 applications. a common way to lower esr and raise ripple current capability is to parallel several capacitors. a typical ltc1530 application might exhibit 5a input ripple cur- rent. sanyo os-con capacitors, part number 10sa220m (220 m f/10v), feature 2.3a allowable ripple current at 85 c; three in parallel at the input (to withstand the input ripple current) meet the above requirements. similarly, avx tpse337m006r0100 (330 m f/6v) capacitors have a rated maximum esr of 0.1 w ; seven in parallel lower the net output capacitor esr to 0.014 w . for low cost applications, the sanyo mv-gx capacitor series can be used with acceptable performance. feedback loop compensation the ltc1530 voltage feedback loop is compensated at the comp pin, which is the output node of the g m error amplifier. the feedback loop is generally compensated with an rc + c network from comp to gnd as shown in figure 8a. loop stability is affected by the values of the inductor, the output capacitor, the output capacitor esr, the error amplifier transconductance and the error amplifier com- pensation network. the inductor and the output capacitor create a double pole at the frequency: applicatio s i for atio wu uu
15 ltc1530 1530fa f l c lc o out = () 1 2 p the esr of the output capacitor and the output capacitor value form a zero at the frequency: f esr c esr out = ()( )( ) 1 2 p the compensation network used with the error amplifier must provide enough phase margin at the 0db crossover frequency for the overall open-loop transfer function. the zero and pole from the compensation network are: f rc and f rc z cc p c = ()()() = ()()() 1 2 1 21 pp respectively. figure 8b shows the bode plot of the overall transfer function. the compensation values used in this design are based on the following criteria, f sw = 12f co , f z = f lc , f p = 5f co . at the closed-loop frequency f co , the attenuation due to the lc filter and the input resistor divider is compensated by the gain of the pwm modulator and the gain of the error amplifier (g merr )(r c ). although a mathematical approach to frequency compen- sation can be used, the added complication of input and/ or output filters, unknown capacitor esr, and gross operating point changes with input voltage, load current variations and frequency of operation all suggest a more practical empirical method. this can be done by injecting a transient current at the load and using an rc network box to iterate toward the final compensation values or by obtaining the optimum loop response using a network analyzer to find the actual loop poles and zeros. table 2 shows the suggested compensation components for 5v input applications based on the inductor and output capacitor values. the values were calculated using mul- tiple paralleled 330 m f avx tps series surface mount tantalum capacitors for the output capacitor. the opti- mum component values might deviate from the suggested values slightly because of board layout and operating condition differences. applicatio s i for atio wu uu c1 r c c c ltc1530 v out comp 1530 f08a + err bg 3 4 figure 8a. compensation pin hook-up loop gain frequency 1530 f08b 20db/decade f sw = ltc1530 switching frequency f co = closed-loop crossover frequency f z f lc f esr f co f p figure 8b. bode plot of the ltc1530 overall transfer function table 2. suggested compensation network for a 5v input application using multiple paralleled 330 m f avx tps output capacitors for 2.5v output l o ( m h) c o ( m f) r c (k w )c c ( m f) c1 (pf) 1 990 1.3 0.022 1000 1 1980 2.7 0.022 470 1 4950 6.8 0.01 220 2.7 990 3.6 0.022 330 2.7 1980 7.5 0.01 220 2.7 4950 18 0.01 68 5.6 990 7.5 0.01 220 5.6 1980 15 0.01 100 5.6 4950 36 0.0047 47 an alternate output capacitor is the sanyo mv-gx series. using multiple paralleled 1500 m f sanyo mv-gx capaci- tors for the output capacitor, table 3 shows the suggested compensation components for 5v input applications based on the inductor and output capacitor values.
16 ltc1530 1530fa table 3. suggested compensation network for a 5v input application using multiple paralleled 1500 m f sanyo mv-gx output capacitors for 2.5v output l o ( m h) c o ( m f) r c (k w )c c ( m f) c1 (pf) 1 4500 3 0.022 470 1 6000 4 0.022 330 1 9000 6 0.022 220 2.7 4500 8.2 0.022 150 2.7 6000 11 0.01 100 2.7 9000 16 0.01 100 5.6 4500 16 0.01 100 5.6 6000 22 0.01 68 5.6 9000 33 0.01 47 note: for different values of v out , multiply the r c value by v out /2.5 and multiply the c c and c1 values by 2.5/v out . this maintains the same crossover frequency for the closed-loop transfer function. thermal considerations limit the ltc1530s junction temperature to less than 125 c. the ltc1530s so-8 package is rated at 130 c/w and care must be taken to ensure that the worst-case input voltage and gate drive load current requirements do not cause excessive die temperatures. short-circuit or fault conditions may activate the internal thermal shutdown circuit. layout considerations when laying out the printed circuit board (pcb), the following checklist should be used to ensure proper operation of the ltc1530. these items are illustrated graphically in the layout diagram of figure 9. the thicker lines show the high current power paths. note that at 10a current levels or above, current density in the pcb itself is a serious concern. traces carrying high current should be as wide as possible. for example, a pcb fabricated with 2oz copper requires a minimum trace width of 0.15" to carry 10a, and only if trace length is kept short. 1. in general, begin the layout with the location of the power devices. orient the power circuitry so that a clean power flow path is achieved. maximize conduc- tor widths but minimize conductor lengths. keep high current connections on one side of the pcb if possible. if not, minimize the use of vias and keep the current density in the vias to <1a/via, preferably < 0.5a/via. after achieving a satisfactory power path layout, pro- ceed with the control circuitry layout. it is much easier to find routes for the relatively small traces in the control circuits than it is to find circuitous routes for high current paths. 2. tie the gnd pin to the ground plane at a single point, preferably at a fairly quiet point in the circuit, such as the bottom of the output capacitors. however, this is not always practical due to physical constraints. connect the low side source to the input capacitor ground. connect the input and output capacitor to the ground plane. run a separate trace for the low side fet source to the input capacitors. do not tie this single point ground in the trace run between the low side fet source and the input capacitor ground. this area of the ground plane is very noisy. 3. locate the small signal resistor and capacitors used for frequency compensation close to the comp pin. use a separate ground trace for these components that ties directly to the gnd pin of the ltc1530. do not connect these components to the ground plane! 4. place the pv cc decoupling capacitor as close to the ltc1530 as possible. the 10 m f bypass capacitor shown at pv cc helps provide optimum regulation performance by minimizing ripple at the pv cc pin. 5. connect the (+) plate of c in as close as possible to the drain of the upper mosfet. ltc recommends an additional 1 m f low esr ceramic capacitor between v in and power ground. 6. the v sense /v out pin is very sensitive to pickup from the switching node. care must be taken to isolate this pin from capacitive coupling to the high current inductor switching signals. a 0.1 m f is recommended between the v out pin and the gnd pin directly at the ltc1530 for fixed voltage versions. for the adjustable voltage ver- sion, keep the resistor divider close to the ltc1530. the bottom resistors ground connection should tie directly to the ltc1530s gnd pin. 7. kelvin sense i max and i fb at the drain and source pins of q1. 8. minimize the length of the gate lead connections. applicatio s i for atio wu uu
17 ltc1530 1530fa + 10 f l o pv cc pv cc gnd g1 g2 comp ltc1530 i fb i max 1 2 3 4 8 7 6 5 v out v out 1530 f09 v in r c r ifb r imax c c c in 0.1 f 0.1 f q1 q2 c1 bold lines indicate high current paths c out + + figure 9. ltc1530 layout diagram device output capacitor (c o )r c c c c1 ltc1530-3.3 7 x330 f 10k 0.022 f 150pf avx tpse337m006r0100 ltc1530-3.3 4 x1500 f 15k 0.022 f 100pf sanyo 6mv1500gx ltc1530-2.8 7 x330 f 8.6k 0.022 f 150pf avx tpse337m006r0100 ltc1530-2.8 4 x1500 f 13k 0.022 f 100pf sanyo 6mv1500gx ltc1530-2.5 7 x330 f 7.5k 0.022 f 220pf avx tpse337m006r0100 ltc1530-2.5 4 x1500 f 11k 0.022 f 120pf sanyo 6mv1500gx ltc1530-1.9 7 x330 f 5.6k 0.033 f 220pf avx tpse337m006r0100 ltc1530-1.9 4 x1500 f 8.2k 0.022 f 220pf sanyo 6mv1500gx 1530 ta tbl figure 10. 5v to 1.9v-3.3v synchronous buck converter pv cc is powered from 12v supply + + 0.1 f 10 f + c o (see table) c in ** l o ? 20 2.7k pv cc 12v pv cc gnd ltc1530 (see table) g1 15 2 4 8 6 7 3 comp i fb i max g2 v out v out 1.9v to 3.3v 14a 1530 f10 v in 5v * siliconix sud50n03-10 ** 3 sanyo 10mv1200gx or 3 sanyo os-con 6sh330k r c c c q1* q2* c1 ? coiltronics ctx02-13198 (2 h) or panasonic etqp6f2r5ha pcc-n6 (2.5 h) (see table) applicatio s i for atio wu uu
18 ltc1530 1530fa 5v to 1.9v-3.3v synchronous buck converter pv cc is generated from charge pump + + 0.1 f 0.22 f 10 f + c o (see table) c in ** l o ? 20 2.7k pv cc gnd ltc1530 (see table) g1 1 5 2 4 8 6 7 3 comp i fb i max g2 v out 1530 ta02 v in 5v * siliconix sud50n03-10 ** 3 sanyo 10mv1200gx or 3 sanyo os-con 6sh330k r c c c q1* q2* c1 ? coiltronics ctx02-13198 (2 h) or panasonic etqp6f2r5ha pcc-n6 (2.5 h) (see table) v out 1.9v to 3.3v 14a mbr0530t1 mbr0530t1 device output capacitor (c o )r c c c c1 ltc1530-3.3 7 x330 f 10k 0.022 f 150pf avx tpse337m006r0100 ltc1530-3.3 4 x1500 f 15k 0.022 f 100pf sanyo 6mv1500gx ltc1530-2.8 7 x330 f 8.6k 0.022 f 150pf avx tpse337m006r0100 ltc1530-2.8 4 x1500 f 13k 0.022 f 100pf sanyo 6mv1500gx ltc1530-2.5 7 x330 f 7.5k 0.022 f 220pf avx tpse337m006r0100 ltc1530-2.5 4 x1500 f 11k 0.022 f 120pf sanyo 6mv1500gx ltc1530-1.9 7 x330 f 5.6k 0.033 f 220pf avx tpse337m006r0100 ltc1530-1.9 4 x1500 f 8.2k 0.022 f 220pf sanyo 6mv1500gx 1530 ta tbl + + c2 0.1 f c5 0.22 f c3 10 f + + c in l1 r2, 20 r1 2.7k pv cc gnd ltc1530-3.3 g1 1 5 2 4 8 6 7 3 comp i fb i max g2 v out 1530 ta09 v in 5v c in = 3 sanyo 10mv1200gx c out = 4 sanyo 6mv1500gx l1 = sumida 6383-t018 (pri = 1 h, sec = 26 h) q1, q2 = siliconix sud50n03-10 q3 = siliconix si4450dy r c 4.7k c c 0.022 f q1 q2 q3 r4 3.74k 1% c4 22 f 35v + c4 33 f 20v c1 220pf v out1 3.3v 14a v out2 12v 0.4a c out d2 mbr0530t1 d1 mbr0530t1 in out adj lt1129cs8 r3 8.25k 1% 5v to dual output (3.3v and 12v) synchronous buck converter typical applicatio s u
19 ltc1530 1530fa ltc1530 3.3v to 1.8v, 14a application + + + + 0.1 f 0.22 f 0.22 f 10 f 10 f 3.3 f + c out 1500 f 4 c in 1500 f 3 l1 2.5 h 20 r1 576 1% r2 1.24k 1% 2.4k pv cc pv cc gnd ltc1530-adj ltc1517-5 g1 1 5 3 2 c1 + c1 4 5 1 2 4 8 6 7 3 comp i fb i max g2 v sense v out gnd v in 1530 ta03 v in 3.3v l1 = panasonic etqp6f2r5ha pcc-n6 c in = 3 sanyo 6mv1500gx c out = 4 sanyo 6mv1500gx r c 13k c c 0.022 f q2 sud50n03 q1 sud50n03 c1 100pf v out 1.8v 14a d1 mbrs120 d2 mbrs120 other methods to generate pv cc supply from 3.3v input 1 f pv cc 12v + 68 f 20v + 47 f l1* 33 h 30 v in gnd sw2 lt1107-12 21 4 5 8 3 sw1 i lim sense 1530 ta04 v in 3.3v * sumida cd54-330k or coilcraft dt3316-473 ** sumida cd43-100 d1 mbrs120t3 1 f pv cc 10v + 10 f 20v + 3.3 f 100pf 3000pf l1** 10 h shdn v in gnd v c lt1317 36 1 4 2 5 sw fb v in 3.3v d1 mbr0520 33k 300k 2.2m typical applicatio s u
20 ltc1530 1530fa ltc1530 high efficiency boost converter pv cc gnd ltc1530 g1 15 2 1530 ta05a 4 8 7 6 q3 irf7811 q4 irf7811 r7 71.5k 1% r6 23.2k 1% q2 irf7811 d2 mbr0530t1 r4 360 d3 mbrs140t3 3 comp g2 i max i fb v sense r2 47k d1 fmmd914 + c16 330 f 10v c17 330 f 10v c18 330 f 10v l1 1 h + c14 330 f 10v + c15 330 f 10v c13 1 f 16v v out 5v 6a + l2 2.1 h r5 0.005 5% + c12 470 f 6v c9 0.22 f 16v + c1 10 f 16v c8 1 f 16v c6 1 f 16v + c11 470 f 6v + c10 1 f 16v c2 1 f 16v c3 1 f 16v r1 10k r3 47k c5 0.022 f q1 fmmt3904 l1 = coilcraft do3316p-102 l2 = sumida cee125c-2r1 v in gnd v out c1 c1 + c4 100pf c7 0.22 f 16v 5 1 v in 3.3v 2 3 4 ltc1517-5 efficiency vs load current load current (a) 0 0 efficiency (%) 20 40 60 1 2 34 1530 ta05b 5 80 100 10 30 50 70 90 6 t a = 25 c v in = 3.3v v out = 5v typical applicatio s u
21 ltc1530 1530fa efficiency vs load current load current (a) 0 0.1 efficiency (%) 1 2 34 1530 ta07b 5 100 90 80 70 60 50 40 30 20 10 0 t a = 25 c ltc1530 5v to C 5v synchronous inverter c in 6 5 4 3 pv cc gnd ltc1530-adj g2 1 5 2 4 7 6 8 3 comp i fb i max g1 v sense c in , c out = 3 sanyo 10mv1200gx l1 = panasonic etqp6f2r5ha (pcc-n6) q1,q2 = siliconix sud50n03-10 r c 4.7k r2 100 r1 2.4k r8 560 1/2w c c 0.22 f c4 0.1 f c3 10 f c1 1000pf r9 680 d2 mbr0530t1 d3 1n4148 d1 mbr0530t1 optional z1 12v zener 1/2w + + + c5 2.2 f c out v out ?v 5a l1 2.5 h c2 10 f r5 10k r3 1k r4 3.09k 1530 ta07a q3 2n7000 1/2 ltc1693-2 1/2 ltc1693-2 v in 5v c7 1000pf r10 330 d5 mbr0530t1 d4 1n4148 q2 q1 c6 2.2 f + + r11 1k r7 4.7 r6 220 1/6w 1 8 7 2 + typical applicatio s u
22 ltc1530 1530fa ltc1530 synchronous sepic converter load current (a) 0 0.1 efficiency (%) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 1530 ta08b 4.0 100 90 80 70 60 50 40 30 20 10 0 t a = 25 c v in = 8v v in = 4v efficiency vs load current gnd fb 1 4 5 5 2 4 6 6 7 8 3 2 3 1 shdn sw v in v c r8 33k r7 300k r6 2.2m c c 0.22 f c1 1000pf c6 100pf c9 4.7 f d1 mbr0520 q1 n-mosfet d2 1n4148 q2 p-mosfet l1b l1a l2 10 h v out 5v 4a v out c out c2 10 f 1530 ta08a r9 5.6 c8 4.7 f c7 3000pf + + + c4 0.1 f c3 10 f + + + + c5 4.7 f + r c 4.7k r1 2.2k r5 20 r sense 0.02 v in 4v to 8v c in c fly i fb pv cc i max ltc1530-adj lt1317 v sense r3 3.09k r4 1k r2 10k gnd g1 g2 4 8 7 3 1 ltc1693-3 c in , c out = 3 sanyo 10mv1200gx c fly = 2 sanyo 16sa150mk l1 = coiltronix ctx02-13198-1 (l1a = 1,2,3 ? 7,8,9; l1b = 10,11,12 ? 4,5,6) l2 = sumida cd43-100 q1 = siliconix n-mosfet si4420dy q2 = siliconix p-mosfet si4425dy r sense = dale lvr-3 3w comp 1,2,3 4,5,6 10,11,12 7,8,9 typical applicatio s u
23 ltc1530 1530fa package descriptio n u s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. .016 ?.050 (0.406 ?1.270) .010 ?.020 (0.254 ?0.508) 45 0 ?8 typ .008 ?.010 (0.203 ?0.254) so8 0502 .053 ?.069 (1.346 ?1.752) .014 ?.019 (0.355 ?0.483) typ .004 ?.010 (0.101 ?0.254) .050 (1.270) bsc 1 n 2 3 4 n/2 .150 ?.157 (3.810 ?3.988) note 3 8 7 6 5 .189 ?.197 (4.801 ?5.004) note 3 .228 ?.244 (5.791 ?6.197) .245 min n 1 2 3 n/2 .160 .005 recommended solder pad layout .045 .005 .050 bsc .030 .005 typ inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm)
24 ltc1530 1530fa lt/tp 1002 1k rev a ? printed in usa ? linear technology corporation 1998 typical applicatio n u linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear.com ltc1530 C 5v to 2.5v, 5a inverting polarity converter related parts c10 1 f c5 0.1 f c4 10 f c out 1500 f 6.3v 3 l1 2.5 h r sense 0.02 q4 2n3904 q5 2n3904 r9 10k r11 10k r12 40k r10 1k r13 1k z2 bzx55c6v2 1/2w, 6.2v pv cc gnd v in = 5v ltc1530-adj g2 1 5 2 4 7 6 8 3 comp i fb i max g1 v sense 1530 ta06 c in , c out = 3 sanyo 6mv1500gx l1 = panasonic etqp6f2r5ha pcc-n6 q1,q2 = siliconix sud50n03-10 r sense = dale lvr-1, 1w r c 5.6k r6 2k r7 22 c c 0.1 f q1 q2 gnd gnd q3 2n3906 hard current limit circuit (optional) c1 1000pf r1 1.5k r2 1k v out * 2.5v 5a z1 1n4742a (optional) mbrs130 r8 4.7 mbrs130 + c8 0.22 f c9 1 f + c in 1500 f 6.3v 3 + *for higher output voltage (ex 3.3v), increase r8 to 20 and install z1 part number description comments ltc1625/ltc1775 no r sense tm current mode synchronous step-down controller 97% efficiency; no sense resistor; 16-pin ssop ltc1628 dual, 2-phase synchronous step-down controller power good output; minimum input/output capacitors; 3.5v v in 36v, synchronizable 150khz to 300khz ltc1709-7 high efficiency, 2-phase synchronous step-down controller up to 42a output; 0.925v v out 2v with 5-bit vid ltc1709-8 high efficiency, 2-phase synchronous step-down controller up to 42a output; vrm 8.4; 1.3v v out 3.5v ltc1735 high efficiency, synchronous step-down controller burst mode ? operation; 16-pin narrow ssop; 3.5v v in 36v ltc1736 high efficiency, synchronous step-down controller with 5-bit vid mobile vid; 0.925v v out 2v; 3.5v v in 36v ltc1772 sot-23 step-down controller current mode; 550khz; very small solution size ltc1773 synchronous step-down controller up to 95% efficiency, 550khz, 2.65v v in 8.5v, 0.8v v out v in , synchronizable to 750khz ltc1778 no r sense , wide input step-down controller no r sense required, 4v v in 36v, true current mode, 0.8v v out , i out 20a ltc1876 2-phase, dual synchronous step-down controller with 3.5v v in 36v, power good output, 300khz operation step-up regulator ltc3701 dual, step-down controller current mode; 300khz to 750khz; small 16-pin ssop, v in < 9.8v ltc3713 low v in high current synchronous step-down controller 1.5v v in 36v, 0.8v v out (0.9)v in , i out up to 20a ltc3778 low v out , optional r sense synchronous step-down controller 0.6v v out (0.9)v in , 4v v in 36v, i out up to 20a ltc3832 high power, low v in step-down controller 3v v in 8v, no r sense , v out 3 0.6v, i out 20a burst mode is a registered trademark of linear technology corporation. no r sense is a trademark of linear technology corporation.

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